This week, Tavis, Sebastian, and I worked to familiarize ourselves with early routing technologies. We studied A 50-Gb/s IP Router, a pioneering paper in this field published 1998 that set the standard for router technology until around 2010. This paper introduced a novel design for an internet router that implemented the forwarding algorithm in software and relied on a crossbar-switch to interconnect its components. Core routing functionality was handled by a high-speed processor in the forwarding engine, while more-complicated auxiliary functionality was handled by the network processor. A specially designed wavefront allocator was responsible for deciding which components could use crossbar-switch at what times and all the header parsing and packet-buffering was implemented on each separate line-card.

We’re putting together a slide-deck to document this specific type of router. Next week, we’ll be discussing how and why the design is implemented in this fashion and what implications that has for its specific use-case. We’ll also bring some questions to gain a better understanding of the hardware and algorithms that made this router possible. Specifically, I hope to clarify the role of the crossbar-switch and network processor. Additionally, I’ve had some trouble understanding the mechanism of wavefront-allocation so I’m hoping to review that as well. I’m expecting that after this review-session we’ll begin studying RMT, the faster, more-flexible router design that came to replace MGR around 2010. This is the structure of the router we’ll be programming in a few weeks from now.